When used for electronic imaging, the photo sensitive devices known as CCD's require a number of different control pulses for proper operation. Normally, a reset pulse biases an output field effect transistor (FET) on the CCD to a precharge level and horizontal clock signals remove the charge representing the information from the CCD. A correlated double sample and hold circuit is often used to extract the value of the video signal from the CCD and it needs precisely positioned clamp and sample pulses. All of these signals, plus others, need to be supplied to the CCD and its associated circuitry to ensure proper operation.
A video camera using a CCD sensor is much reduced in size from one using a vidicon tube because of the much smaller size of a CCD. Medical and some industrial applications, however, demand still smaller sizes of imaging systems. The tip of a pencil may, for example, represent the size needed for some applications. Integrating the sample and hold circuitry on a CCD helps reduce both the number of external parts and the bandwidth needed to transmit the electrical output signal. Without more, however, the number of wires leading to the CCD sensor to supply the necessary control signals from external electronics is still large enough to make any connecting cable undesirably large and bulky. Unfortunately, both the d c reference levels and the amplitudes of the clock signals required by &he CCD tend to vary widely in different applications, making it extremely difficult to rely upon such clock signals as sources for the generation of other control pulses at the transistor transistor logic (TTL) voltage levels likely to be required.
Accordingly, a need exists for reducing the number of wires leading to a CCD sensor from the external electronics without detracting from proper system operation. There is also a related need for generating TTL level control pulses from CCD clock signals which may differ widely in amplitude and d-c reference level from one application to another.